01. Selected measurements
These results do not describe one universal build. They are specific to separate model artifacts and test procedures. Placement means MLComputePlan-assigned compute operations; it is not a direct trace of ANE firmware micro-operations.
| Artifact / experiment | Observation | Result | Scope |
|---|---|---|---|
| Qwen2.5-1.5B Instruct / 28L LUT4 | MLComputePlan / infer | 2,090 ANE 79 CPU | CPU residual: lm_head / argmax tail. 96.4% / 3.6% by assigned ops. |
| Qwen2.5-1.5B / KV state path | ANE-assigned state primitives | 394 / 394 | 56 slice_update + 57 read_state + 56 write_state + 225 slice_by_index. |
| Qwen2.5 / decode batch sweep | Aggregate tokens per second | 102.1 at B=4 | Five-round interleaved steady-state run. Real batch-shaped artifact. |
| Qwen2.5 / LUT4 model quality | WikiText-2 perplexity | 16.8033 | Specific hand-authored 28L quantized artifact, with position-correct RoPE. |
| LFM S2 sealed production graph | ANE compute placement | 743 / 743 | MLComputePlan for two-output artifact, not separately compiled debug graph. |
| LFM S2 / output parity | ANE vs fixture relative L2 | 0.01730 0.02786 | Two declared production outputs. ANE gate relative L2 ≤ 0.03. |
Source receipts: ANE-RE FINDINGS §2, §7–§12; D028 / D263; LFM S2 native parity receipt dated 2026-07-18. Public summary, not a release of private model files or raw logs.
02. Quantized transformer execution
A central experiment builds a 28-layer Qwen2.5-1.5B-Instruct path around four-bit lookup-table weights and native Core ML graph generation. The objective is more precise than “use the Neural Engine”: keep attention, projection, normalization and KV-state machinery in ANE-compatible tensor form and demonstrate the exact assigned device for the resulting operations.
The production model's infer function had 2,090 operations assigned to ANE and 79 assigned to CPU. The residual CPU assignments belong to the language-model-head argmax tail. Separately, the tested stateful KV primitives—slice_update, read_state, write_state and slice_by_index—were assigned to ANE. A CPU tail does not invalidate a measured ANE-resident state path, and the state path does not justify calling the whole graph 100% ANE.
state_ops = {
slice_update: 56 / 56 # ANE / total
read_state: 57 / 57
write_state: 56 / 56
slice_by_index: 225 / 225
}
infer.ops: ANE=2090 | CPU=79
observation: MLComputePlan assignmentCritical compiler constraints include FP16 rank-four graph geometry, integer gather indices, and append-only handling of Core ML's external weight blobs. See the Qwen field note for the failure cases that established those rules.
03. Measured batch throughput
The batch sweep measures aggregate throughput on the A18 Pro test system, not individual interactive-user token rate. Each batch value came from a compiled graph with matching physical input dimensions.
Batch=4 is the measured efficiency knee for this setup. A previously proposed “57.3 tok/s bandwidth ceiling” was later falsified by sequence sweep results and by a LUT2 experiment that reduced weights without increasing throughput. The updated result distinguishes low-depth dispatch overhead from compute cost at 28 layers. Read the analysis.
04. Liquid architecture parity
A separate LFM block-pair S2 production artifact was evaluated under .cpuOnly and .cpuAndNeuralEngine and compared with a pinned FP16 fixture. Placement classified 743/743 compute operations on ANE for that sealed artifact. The native runner rejected non-finite output values and evaluated cosine similarity, max absolute difference and relative L2 error.
| Declared output | ANE cosine | ANE relative L2 | Gate |
|---|---|---|---|
| lfm_h_after_liv | 0.999886220 | 0.017295585 | Pass |
| lfm_h_after_gqa | 0.999761005 | 0.027863104 | Pass |
The diagnostic artifact exposed 46 outputs, changing the compiled graph; only 34 of them satisfied the ANE gate. The diagnostic divergence is a separate result, not evidence that the sealed two-output production graph failed. Examine both cases.
05. What the results do not say
These findings do not establish ANE residency for arbitrary transformer architectures, every token-processing operation, or every Core ML/compiler release. Assigned compute unit is an API-visible planner result. Numeric parity and measured end-to-end speed are distinct experiments with their own conditions.
Research is ongoing. Hypotheses, performance projections, and experimental surrogate shapes are kept separate from hardware-qualified measurements. Negative results and retractions remain part of the record, rather than being silently replaced by favorable headlines.